Fast and unified SystemC AMS - HDL simulation

An agile methodology for mixed signal simulation is presented allowing seamless connection of simulators on as needed basis eliminating overheads of the communication backplane, sophisticated synchronization and kernel modification. The methodology uses the SystemC AMS synchronization layer which supports user defined solvers and simulators. The cosimulation is wrapped in a statically scheduled timed dataflow node. The simulated executable specification enables co-design, partitioning, refinement, virtual prototyping and architecture exploration of the design space.