Flip-Chip Mounting of an RF IC using Eutectic Solder Bumps

For the DECT telephone system, a zero-IF front-end Integrated Circuit (UAA2078) has been designed in Philips´ high speed QUBIC BiCMOS process. This IC contains all RF circuits required to directly down-convert the RF signal to the IF frequency around zero. At these high frequencies (1.8 GHz), it is advantageous to use flip-chip as mounting technique. Wide-band measurements of the input impedance showed that the residual parasitics associated with the eutectic solder bumps are negligible compared with the parameters of the internal IC components. To accomodate the residual stresses from differences in CTE, the gap between the IC and the substrate is underfilled. This underfill material does not affect chip behaviour too much at frequencies up to a few GHz. To study its mechanical behaviour, cumulative failure distributions have been investigated. The effect of the underfilling is studied by temperature shock-testing. From testing different types of underfill, it appears that the adhesion properties and flow characteristics of the underfill material are the dominating factors for the number of cycles to failure.