DocumentCode
513731
Title
A 0.10 μm NMOS transistor with Heavy Ion Implanted Pockets (HIIP)
Author
Benistant, F. ; Guegan, G. ; Tedesco, S. ; Martin, F. ; Heitzmann, M.
Author_Institution
LETI (CEA - Technologies Avancées) 17, rue des Martyrs, 38054 Grenoble Cedex 9 France
fYear
1995
fDate
25-27 Sept. 1995
Firstpage
105
Lastpage
108
Abstract
0.10 μm NMOS devices have been fabricated with Heavy Ion Implanted Pockets (HIIP). For the first time, Boron, Gallium and Indium pockets have been compared. These three architectures are refered to a 0.10 μm implantation NMOS transistor without pocket. The channel doping is optimised with Boron at low energy and low dose. The source drain and extensions are defined with high dose of Arsenic implantation. Because of very small spreading implantation profiles heavy ions are very good candidates to realize ultra-small devices. The localization of pockets are more precised under the extension without large spreading in the channel and under the source drain junctions. Consequently, the threshold voltage is compatible with 1.5 V supply voltage, and the junction capacitances are maintained low. Using heavy ions for pockets, we have demonstrated that reduced short channel effects and good current drive capability can be obtained without increasing device design complexity.
Keywords
Boron; Capacitance; Doping; Gallium compounds; Implants; Impurities; Indium; MOS devices; MOSFETs; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1995. ESSDERC '95. Proceedings of the 25th European
Conference_Location
The Hague, The Netherlands
Print_ISBN
286332182X
Type
conf
Filename
5436002
Link To Document