DocumentCode
516368
Title
A 125 MHz Monolithic Transceiver Interface for Fiber Distributed Data Interface
Author
Sun, Sam Yinshang
Author_Institution
Micronix Integrated Systems, Inc., Laguna Hills, California, USA
Volume
1
fYear
1991
fDate
11-13 Sept. 1991
Firstpage
225
Lastpage
228
Abstract
A single chip FDDI transceiver is presented. A crystal based dual PLL locks to 125 Mb/s NRZI data and captures them. The receiver jitter tolerance is 6.1 nS. The transmitter converts parallel data into serial data by a PLL generated 125 MHz clock. The high level integration and robust asynchronous operation are achieved. This transceiver operates at a single 5 V supply and dissipates 1.2 W.
Keywords
Clocks; Detectors; FDDI; Frequency; Optical receivers; Optical transmitters; Phase locked loops; Timing jitter; Transceivers; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1991. ESSCIRC '91. Proceedings - Seventeenth European
Conference_Location
Milan, Italy
Type
conf
Filename
5467980
Link To Document