DocumentCode
516488
Title
A 32 kbit Variable Length Shift Register for Digital Audio Application
Author
Pelgrom, Marcel ; Termeer, Henk
Author_Institution
Philips Research Laboratories, PO Box 80000, 5600JA Eindhoven, The Netherlands.
fYear
1986
fDate
16-18 Sept. 1986
Firstpage
38
Lastpage
40
Abstract
On this chip dynamic shift registers are combined with high density CCD SPS memory blocks. The shift register length can be adjusted from 17 to 32767 clock periods. The chip has been realized in a 2.5 ¿n NMCS process with CCD option.
Keywords
Charge coupled devices; Circuits; Clocks; Delay effects; Flip-flops; Pipelines; Random access memory; Read-write memory; Shift registers; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1986. ESSCIRC '86. Twelfth European
Conference_Location
Delft, The Netherlands
Type
conf
Filename
5468268
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