Design and simulation of a down-conversion CMOS mixer for UWB applications

In this paper, a CMOS down-conversion mixer for UWB applications is presented. The mixer circuit is designed by using a TSMC 0.18 um RF CMOS technology, working at the 3.1 GHz-10.6 GHz frequency Range. The core of the mixer has been designed based on Gilbert cell architecture and uses a Current Bleeding method for increasing the linearity, decreasing direct noise and improvement of conversion gain. A wide band matching is used in RF and LO inputs to provide a good match over the entire frequency range. Also a series capacitor and inductor is connected between the common source node of LO switches to resonate the parasitic capacitance out that conversion gain, noise and linearity are significantly improved. The simulated conversion gain of the mixer is 11 ± 1.5 dB. The 1 dB compression point is bigger than -8 dB and IIP3 is between 0-4 dBm. RF return loss is well below -11dB. Also, the LO-IF feed-through is smaller than -250 dBm, while NF is almost 11dB. The DC power consumption of the mixer is only 8.5 mW. All characteristics are achieved for the entire frequency range of 3-11 GHz and provide the UWB standard requirements.