Multibit continuous-time ΣΔ modulator with reduced number of feedback levels

A multibit continuous-time sigma-delta modulator, where truncation error shaping and cancellation techniques are applied, is proposed. These techniques are proposed in order to reduce the number of levels in the feedback digital-to-analogue converters and then eliminate the use of linearization techniques. Mathematical analysis, advantages and obstacles are discussed when two different coding schemes are employed in the 1^st feedback digital-to-analogue converter of the continuous-time sigma-delta modulator. The proposed architecture is designed and simulated considering a wireless mobile application.