Power-efficient variation-aware photonic on-chip network management

Recent advances in nanophotonic technology have made nanophotonic interconnect an attractive on-chip communication solution for emerging many-core systems. However, fabrication-induced process variation and run-time system thermal effects directly affect nanophotonic device operation, and introduce serious challenges, e.g., signal power loss and crosstalk, to the power, performance and reliability of nanophotonic communication. This article first develops models to characterize nanophotonic process and thermal variation effects. Next, it presents a run-time management solution, an integration of inter-channel hopping, intra-channel wavelength tuning and variation-aware routing. Together, the proposed techniques can optimize the performance and reliability of nanophotonic communication with excellent power efficiency.