DocumentCode
533344
Title
On-chip system level protection of FM antenna pin
Author
Notermans, Guido ; Maksimovic, Dejan ; Vermont, Gerd ; Van Maasakkers, Michiel ; Pusa, Fredrik ; Smedes, Theo
Author_Institution
ST Ericsson, Zurich, Switzerland
fYear
2010
fDate
3-8 Oct. 2010
Firstpage
1
Lastpage
8
Abstract
An on-chip protection against IEC 61000-4-2 discharges is presented. The protection level is tested by means of HMM stress. The failure signature is identified by means of TLP testing and physical failure analysis. It is shown that it is possible to accurately predict the HMM failure level by means of a simplified circuit model, calibrated by means of 100 ns TLP data.
Keywords
IEC standards; antennas; electrostatic discharge; failure analysis; integrated circuit testing; FM antenna pin; HMM stress; IEC 61000-4-2 discharges; TLP testing; circuit model; failure signature; human metal model; on-chip system level protection; physical failure analysis; time 100 ns; Antennas; Clamps; Discharges; Frequency modulation; Hidden Markov models; Integrated circuit modeling; Metals;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD), 2010 32nd
Conference_Location
Reno, NV
Print_ISBN
978-1-58537-182-2
Electronic_ISBN
978-1-58537-182-2
Type
conf
Filename
5623711
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