Proposal of backside Die-level analysis

We propose a Die-level backside analysis system, which makes it possible to apply backside emission analysis and the Optical Beam Induced Resistance Change (OBIRCH) for die chips. It is possible to analyze only failure dies without sacrificing good dies which exist on the same wafer with this system. As a result, we realize cost free wafer-level failure analysis. Furthermore, we have developed Solid Immersion Lens(SIL) plate realizing high spatial resolution observation conveniently. The die chip is ideal to apply to the SIL-plate, so that we can achieve high sensitivity and resolution efficiently.