• DocumentCode
    549493
  • Title

    3D heterogeneous system integration: Application driver for 3D technology development

  • Author

    Beyne, Eric ; Marchal, Pol ; Van der Plas, Geert

  • Author_Institution
    Imec, Leuven, Belgium
  • fYear
    2011
  • fDate
    5-9 June 2011
  • Firstpage
    213
  • Lastpage
    213
  • Abstract
    Three dimensional integration complements semiconductor scaling; it enables a higher integration density as well as heterogeneous technology integration. Using 3D chip stacking, it is possible to extend the number of functions per 3D chip well beyond the near-term capabilities of traditional scaling. The 3D strata may be realized using advanced CMOS technology nodes but may also exploit a wide variety of device technologies to optimize system performance.
  • Keywords
    CMOS integrated circuits; integrated circuit interconnections; semiconductor device packaging; 3D chip stacking; 3D heterogeneous system integration; 3D interconnects; 3D strata; 3D technology development; advanced CMOS technology; application driver; semiconductor scaling; Integrated circuit interconnections; Integrated circuit modeling; Stress; System-on-a-chip; Three dimensional displays; Through-silicon vias;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
  • Conference_Location
    New York, NY
  • ISSN
    0738-100x
  • Print_ISBN
    978-1-4503-0636-2
  • Type

    conf

  • Filename
    5981755