DocumentCode
549632
Title
Efficient incremental analysis of on-chip power grid via sparse approximation
Author
Sun, Pei ; Li, Xin ; Ting, Ming-Yuan
Author_Institution
ECE Dept., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
2011
fDate
5-9 June 2011
Firstpage
676
Lastpage
681
Abstract
In this paper, a new sparse approximation technique is proposed for incremental power grid analysis. Our proposed method is motivated by the observation that when a power grid network is locally updated during circuit design, its response changes locally and, hence, the incremental “change” of the power grid voltage is almost zero at many internal nodes, resulting in a unique sparse pattern. An efficient Orthogonal Matching Pursuit (OMP) algorithm is adopted to solve the proposed sparse approximation problem. In addition, several numerical techniques are proposed to improve the numerical stability of the proposed solver, while simultaneously maintaining its high efficiency. Several industrial circuit examples demonstrate that when applied to incremental power grid analysis, our proposed approach achieves up to 130× runtime speed-up over the traditional Algebraic Multi-Grid (AMG) method, without surrendering any accuracy.
Keywords
integrated circuit design; iterative methods; power integrated circuits; sparse matrices; algebraic multi-grid method; incremental analysis; numerical stability; on-chip power grid; orthogonal matching pursuit algorithm; sparse approximation; Algorithm design and analysis; Equations; Fitting; Matching pursuit algorithms; Mathematical model; Matrix decomposition; Power grids; Incremental Analysis; Integrated Circuit; Power Grid;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
Conference_Location
New York, NY
ISSN
0738-100x
Print_ISBN
978-1-4503-0636-2
Type
conf
Filename
5981988
Link To Document