A practical differential power analysis attack against an FPGA implementation of AES cryptosystem

Differential Power Analysis (DPA) implies measuring the supply current of a cipher-circuit in an attempt to uncover part of a cipher key. Cryptographic security gets compromised if the current waveforms obtained correlate with those from a hypothetical power model of the circuit. In recent years, the security of the Advanced Encryption Standard (AES) against Differential (DPA), has received considerable attention. While FPGAs are becoming increasingly popular for cryptographic applications, there are only a few articles that assess their vulnerability to such attacks. The purpose of this paper is to describe a practical and successful implementation of the attack and provide strong evidence that DPA is a serious threat against realizations of the AES on SRAM-based FPGAs without effective countermeasure.