Etch process optimization and electrical improvement in TiN hard mask ultra-low k interconnection

Presents a collection of slides covering the following topics: We have demonstrated the TiN hard mask etching process key nodes of M1 and dual-damascene applications. N2 IGI can help to clean out the polymer resides in the via chamfer. Movable gap is one of key nodes to tune the C-E uniformity. Decreasing cathode temperature would shrink the BCD of via. M1 and M2 trench BCD have excellent uniformity performance which are 1.3 nm and 1.8 nm of 3-sigma, respectively. N2/02 post etch treatment can improve M1 trench electrical yield up to 14% compare to C02 PET. The yield of the 1 million via chain with dual damascene etch process is over 97% after diluted HF solution clean. There is no obvious plasma damage on ULK film after etch process. AMAT Producer twin-chamber is capable to etch oxide wafers and TiN applications with 02 ICC and Cl2 ICC.