Synchronization for hybrid MPSoC full-system simulation

Author

Murillo, Luis Gabriel ; Eusse, Juan ; Jovic, Jovana ; Yakoushkin, Sergey ; Leupers, Rainer ; Ascheid, Gerd

Author_Institution

Inst. for Commun. Technol. & Embedded Syst., RWTH Aachen Univ., Aachen, Germany

fYear

2012

fDate

3-7 June 2012

Firstpage

121

Lastpage

126

Abstract

Full-system simulators are essential to enable early software development and increase the MPSoC programming productivity, however, their speed is limited by the speed of processor models. Although hybrid processor simulators provide native execution speed and target architecture visibility, their use for modern multi-core OSs and parallel software is restricted due to dynamic temporal and state decoupling side effects. This work analyzes the decoupling effects caused by hybridization and presents a novel synchronization technique which enables full-system hybrid simulation for modern MPSoC software. Experimental results show speed-ups from 2× to 45× over instruction-accurate simulation while still attaining functional correctness.

Keywords

multiprocessing systems; operating systems (computers); parallel architectures; parallel programming; software engineering; synchronisation; system-on-chip; MPSoC programming productivity; dynamic temporal side effects; hybrid MPSoC full-system simulation; hybrid processor simulators; instruction-accurate simulation; multicore OSs; parallel software; processor models; software development; state decoupling side effects; synchronization; target architecture visibility; Computer architecture; Context; Context modeling; Kernel; Suspensions; Synchronization; HySim; Hybrid Simulation; MPSoC; Synchronization; Temporal Decoupling; Virtual Platforms;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE

Conference_Location

San Francisco, CA

ISSN

0738-100X

Print_ISBN

978-1-4503-1199-1

Type

conf

Filename

6241499