• DocumentCode
    566108
  • Title

    Digital intermediate frequency module design of high-speed wireless broadband receiver

  • Author

    Dai, Jing ; Chang, Chunjiang ; Wang, Sainan ; Liu, Jian

  • Author_Institution
    Faculty of Information and Control Engineering, Shenyang Jianzhu University, 9 Hunnan East Road, Hunnan New District, 110168 China
  • fYear
    2012
  • fDate
    24-26 June 2012
  • Firstpage
    683
  • Lastpage
    688
  • Abstract
    Based on the design concept of software radio, the digital intermediate frequency module was constructed in the wireless broadband receiver in order to enable the functionality of frequency mixing, decimating, filtering and modulating. Digital intermediate frequency module mainly consists of CIC decimation filter, FIR filter, CIC interpolating filter and NCO. Arithmetic study has been done to all parts of digital intermediate frequency module. The digital intermediate frequency module was programmed with VHDL Hardware description language, and it is achieved in the chip of cyclone III Ep3c55f484-c8 FPGA manufactured by Altera International Limited. Gain flatness excels 3dB with 24MHz pass band for the wireless receiver based on the digital intermediate frequency module. Central frequency is 942MHz, and channel out-band rejection in 400KHz can reach 76dBc while restrained in 1MHz can reach 95dBc with time delay less than 10 ?s.
  • Keywords
    CIC; FPGA; digital intermediate frequency; wireless receiver;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Modelling, Identification & Control (ICMIC), 2012 Proceedings of International Conference on
  • Conference_Location
    Wuhan, Hubei, China
  • Print_ISBN
    978-1-4673-1524-1
  • Type

    conf

  • Filename
    6260290