• DocumentCode
    572284
  • Title

    DBAR: An efficient routing algorithm to support multiple concurrent applications in networks-on-chip

  • Author

    Ma, Sheng ; Jerger, Natalie Enright ; Wang, Zhiying

  • Author_Institution
    Sch. of Comput., Nat. Univ. of Defense Technol., Changsha, China
  • fYear
    2011
  • fDate
    4-8 June 2011
  • Firstpage
    413
  • Lastpage
    424
  • Abstract
    With the emergence of many-core architectures, it is quite likely that multiple applications will run concurrently on a system. Existing locally and globally adaptive routing algorithms largely overlook issues associated with workload consolidation. The shortsightedness of locally adaptive routing algorithms limits performance due to poor network congestion avoidance. Globally adaptive routing algorithms attack this issue by introducing a congestion propagation network to obtain network status information beyond neighboring nodes. However, they may suffer from intra- and inter-application interference during output port selection for consolidated workloads, coupling the behavior of otherwise independent applications and negatively affecting performance. To address these two issues, we propose Destination-Based Adaptive Routing (DBAR). We design a novel low-cost congestion propagation network that leverages both local and non-local network information for more accurate congestion estimates. Thus, DBAR offers effective adaptivity for congestion beyond neighboring nodes. More importantly, by integrating the destination into the selection function, DBAR mitigates intra- and inter-application interference and offers dynamic isolation among regions. Experimental results show that DBAR can offer better performance than the best baseline algorithm for all measured configurations; it is well suited for workload consolidation. The wiring overhead of DBAR is low and DBAR provides improvement in the energy-delay product for medium and high injection rates.
  • Keywords
    multiprocessing systems; network routing; network-on-chip; DBAR; congestion propagation network; destination-based adaptive routing; dynamic isolation; energy-delay product; globally adaptive routing algorithms; injection rates; interapplication interference; intraapplication interference; locally adaptive routing algorithms; many-core architectures; multiple concurrent applications; network status information; networks-on-chip; nonlocal network information; output port selection; workload consolidation; Adaptive systems; Algorithm design and analysis; Educational institutions; Heuristic algorithms; Interference; Routing; Networks-on-chip; Routing Algorithm; Workload Consolidation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture (ISCA), 2011 38th Annual International Symposium on
  • Conference_Location
    San Jose, CA
  • ISSN
    1063-6897
  • Print_ISBN
    978-1-4503-0472-6
  • Type

    conf

  • Filename
    6307521