• DocumentCode
    579743
  • Title

    Assessing Energy Efficiency of Fault Tolerance Protocols for HPC Systems

  • Author

    Meneses, Esteban ; Sarood, Osman ; Kalé, Laxmikant V.

  • Author_Institution
    Dept. of Comput. Sci., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
  • fYear
    2012
  • fDate
    24-26 Oct. 2012
  • Firstpage
    35
  • Lastpage
    42
  • Abstract
    An exascale machine is expected to be delivered in the time frame 2018-2020. Such a machine will be able to tackle some of the hardest computational problems and to extend our understanding of Nature and the universe. However, to make that a reality, the HPC community has to solve a few important challenges. Resilience will become a prominent problem because an exascale machine will experience frequent failures due to the large amount of components it will encompass. Some form of fault tolerance has to be incorporated in the system to maintain the progress rate of applications as high as possible. In parallel, the system will have to be more careful about power management. There are two dimensions of power. First, in a power-limited environment, all the layers of the system have to adhere to that limitation (including the fault tolerance layer). Second, power will be relevant due to energy consumption: an exascale installation will have to pay a large energy bill. It is fundamental to increase our understanding of the energy profile of different fault tolerance schemes. This paper presents an evaluation of three different fault tolerance approaches: checkpoint/restart, message-logging and parallel recovery. Using programs from different programming models, we show parallel recovery is the most energy-efficient solution for an execution with failures. At the same time, parallel recovery is able to finish the execution faster than the other approaches. We explore the behavior of these approaches at extreme scales using an analytical model. At large scale, parallel recovery is predicted to reduce the total execution time of an application by 17% and reduce the energy consumption by 13% when compared to checkpoint/restart.
  • Keywords
    checkpointing; energy conservation; fault tolerant computing; parallel processing; power aware computing; protocols; HPC systems; analytical model; checkpoint-restart approach; energy consumption; energy efficiency assessment; exascale machine; fault tolerance layer; fault tolerance protocols; message-logging approach; parallel recovery approach; power management; Benchmark testing; Computer crashes; Energy consumption; Fault tolerance; Fault tolerant systems; Protocols; Sockets; energy efficiency; fault tolerance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture and High Performance Computing (SBAC-PAD), 2012 IEEE 24th International Symposium on
  • Conference_Location
    New York, NY
  • ISSN
    1550-6533
  • Print_ISBN
    978-1-4673-4790-7
  • Type

    conf

  • DOI
    10.1109/SBAC-PAD.2012.12
  • Filename
    6374769