Research of Free Resource Rectangles Management on FPGA Area Based on CPTR

To efficiently manage the hardware free resources for the placing of tasks on FPGA and taking full advantage of the partially reconfigurable units, good utilization of chip resources is an important and necessary work. In this paper a new method is proposed to manage maximal free resource rectangles based on the cross point of edge lines of running tasks on FPGA area. The research contains the search of complete set of free rectangle resource and the dynamic management of free resource on the placement and leaving of hardware task in runtime task scheduling. Simulation results show that our algorithm has a shorter time execution compared to state of the art algorithms aiming at maximum free rectangles.