Network-on-chip routing using Structural Diametrical 2D mesh architecture

Performance of a NoC (network-on-chip) strongly depends on its underlying architecture and related routing techniques. A structural scalable interconnection architecture may significantly increase the performance of a NoC in terms of scalability, modularity, transport latency and parallelism in communication. Well-constructed network architecture will also balance load of the network and try to reduce the chance of causing a hot spot on the network. In this work, our primary objective was to design an efficient NoC architecture to increase its performance in all these aspects with distribution of the load across the network and trying to reduce the diameter of the network in order to reduce the cost of routing. In this paper, we present a new architecture, called Structural Diametrical 2D (SD2D) mesh based on Structural Diametrical XY deterministic routing algorithm that tries to balance the load of the network, increase the level of parallelism, ensures that the packet will always reach the destination through the possible shortest path, and the path is deadlock free.