DocumentCode
598449
Title
Electrical properties of strained Si p-n junctions
Author
Wangran Wu ; Xiangming Xu ; Zhe Yuan ; Jiabao Sun ; Yi Zhao ; Yi Shi
Author_Institution
Sch. of Electron. Sci. & Eng., Nanjing Univ., Nanjing, China
fYear
2012
fDate
Oct. 29 2012-Nov. 1 2012
Firstpage
1
Lastpage
3
Abstract
p-n junctions are of great importance for both modern Si complementary metal oxide semiconductors (CMOS) devices and other semiconductor devices. In this study, we experimentally examined the strain induced modification of the current-voltage characteristics of Si p-n junctions. The strain was applied to the forward biased p+-n and n+-p junctions though a wafer bending method. It is observed that, under the uniaxial tensile stress, the ideality factor in the diffusion current region of a forward p-n junction decreases with the increase in the applied stress. Meanwhile, the junction current increases with the increase in the applied stress. It is also found that the applied uniaxial tensile stress causes a significant junction-current increase in the large forward biases region and a relative small current increase in the diffusion current region.
Keywords
CMOS integrated circuits; electric properties; elemental semiconductors; p-n junctions; silicon; Si; complementary metal oxide semiconductor devices; current-voltage characteristics; diffusion current region; electrical properties; forward biased n+-p junctions; forward biased p+-n junctions; strain induced modification; strained junctions; uniaxial tensile stress; wafer bending method; Current-voltage characteristics; P-n junctions; Silicon; Strain; Tensile stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location
Xi´an
Print_ISBN
978-1-4673-2474-8
Type
conf
DOI
10.1109/ICSICT.2012.6467920
Filename
6467920
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