Chip-package-PCB co-design for optimization of wireless receiver performance

The co-design of chip-package-PCB is imperative for a modern wireless receiver to achieve the best circuit performance. This paper proposes simulation-based co-design methodologies which can accurately predict the package and PCB parasitic effects on the low noise amplifier (LNA). To begin with, a chip-package co-design methodology is put forth for the LNA circuit to design its inductive degeneration in package. Then the PCB parasitic effects are included in the circuit simulation as well. The favorable topology of impedance matching network is thus evaluated and the associated SMT values can be determined methodically. By applying the proposed co-design methodologies, the receiver performance is able to be optimized in the circuit design phase.