• DocumentCode
    601097
  • Title

    A dual core low power microcontroller with openMSP430 architecture for high reliability lockstep applications using a 180 nm high voltage technology node

  • Author

    Sondon, Santiago ; Mandolesi, Pablo ; Masson, F. ; Julian, Pedro ; Palumbo, Francesca

  • Author_Institution
    GISEE, Univ. Nac. del Sur, Bahia Blanca, Argentina
  • fYear
    2013
  • fDate
    Feb. 27 2013-March 1 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    System and physical design of a dual core low power microcontroller based on an openMSP430 architecture is reported in this work. The system includes an on-chip program and data memory and a timer and a GPIO as peripherals. A top-down design flow has been followed using a digital standard cell library. The design has been manufactured on a commercial 180 nanometer high voltage technology node. The results of the followed design steps and simulation performance are given.
  • Keywords
    integrated circuit design; low-power electronics; microcontrollers; GPIO; data memory; digital standard cell library; dual-core low power microcontroller; high-reliability lockstep applications; high-voltage technology node; on-chip program; openMSP430 architecture; size 180 nm; top-down design flow; Clocks; Computer architecture; Libraries; Microcontrollers; Random access memory; Standards;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (LASCAS), 2013 IEEE Fourth Latin American Symposium on
  • Conference_Location
    Cusco
  • Print_ISBN
    978-1-4673-4897-3
  • Type

    conf

  • DOI
    10.1109/LASCAS.2013.6519085
  • Filename
    6519085