DocumentCode
602984
Title
Clustering techniques and statistical fault injection for selective mitigation of SEUs in flip-flops
Author
Evans, Adrian ; Nicolaidis, Michael ; Shi-Jie Wen ; Asis, T.
Author_Institution
iROC Technol., France
fYear
2013
fDate
4-6 March 2013
Firstpage
727
Lastpage
732
Abstract
In large SoCs, managing the effects of soft-errors in flip-flops is essential, however, selective mitigation is necessary to minimize the area and power costs. The identification of the optimal set of flip-flops to protect typically requires compute-intensive fault-injection campaigns. We present new techniques which group similar flip-flops into clusters to significantly reduce the number of fault injections. The number of required fault injections can be significantly lower than the total number of flip-flops and in one industrial design with over 100,000 flip-flops, by simulating only 2,100 fault injections, the technique identified a set of 4.1% of the flip-flops, which when protected, reduced the critical failure rate by a factor of 7x.
Keywords
flip-flops; integrated circuit reliability; radiation hardening (electronics); system-on-chip; SEU selective mitigation; SoC; clustering technique; flip-flops; soft-error effect; statistical fault injection; Circuit faults; Flip-flops; Hardware design languages; Integrated circuit modeling; Reliability; Sensitivity; System-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design (ISQED), 2013 14th International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1948-3287
Print_ISBN
978-1-4673-4951-2
Type
conf
DOI
10.1109/ISQED.2013.6523691
Filename
6523691
Link To Document