DocumentCode
604744
Title
A Test Design for Quick Determination of Incoherency in Chip Multiprocessors´ Cache Realizing MOESI Protocol
Author
Dalui, M. ; Sikdar, B.K.
Author_Institution
Dept. of Comput. Sci. & Eng., Nat. Inst. of Technol., Durgapur, India
fYear
2012
fDate
19-22 Dec. 2012
Firstpage
216
Lastpage
220
Abstract
The data coherence in the cache systems of CMPs (Chip Multi-Processors) is to be more accurate and reliable. In this work, we propose an effective solution to the issue through introduction of highly efficient test logic (fault detection unit). The test design is based on the modular structure of Cellular Automata (CA). The SACA (single length single cycle attractor cellular automata) has been introduced to identify the inconsistencies in cache line states of processors´ private caches realizing the MOESI protocol. The simple hardware implementation of the CA based design realizes quick decision on the cache coherency in CMPs with 100% accuracy.
Keywords
cache storage; cellular automata; logic testing; microprocessor chips; CMP; MOESI protocol; SACA; cellular automata; chip multiprocessors cache; data coherence; fault detection unit; modular structure; single length single cycle attractor; test logic;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic System Design (ISED), 2012 International Symposium on
Conference_Location
Kolkata
Print_ISBN
978-1-4673-4704-4
Type
conf
DOI
10.1109/ISED.2012.67
Filename
6526587
Link To Document