Test structures for electrical evaluation of high aspect ratio TSV arrays fabricated using planarised sacrificial photoresist

Author

Zhang, Rongting ; Li, Yuhua ; Murray, Jacob ; Bunting, A.S. ; Smith, Samuel ; Dunare, C.C. ; Stevenson, J.T.M. ; Desmulliez, M.P. ; Walton, A.J.

Author_Institution

Inst. of Integrated Micro & Nano Syst., Univ. of Edinburgh, Edinburgh, UK

fYear

2013

fDate

25-28 March 2013

Firstpage

37

Lastpage

42

Abstract

An improved bottom-up electroplating technique has been successfully developed for the fabrication of TSV arrays with 9.5:1 aspect ratios. 125,500 TSVs have been fabricated in an area of 6×6 cm with a horizontal and vertical pitch of 240 μm. A method of visually inspecting the via yield is presented, and Kelvin test structures and contact chain test structures have been fabricated to electrically evaluate single and multiple TSVs respectively. The average resistance of the Cu vias was measured as of 9.1 mΩ using the Kelvin contact resistance structures.

Keywords

copper; electroplating; integrated circuit interconnections; photoresists; three-dimensional integrated circuits; Cu; Kelvin contact resistance structures; Kelvin test structures; bottom-up electroplating; contact chain test structures; electrical evaluation; high aspect ratio TSV arrays; planarised sacrificial photoresist; size 240 mum; size 6 cm; through-silicon-via technology; Copper; Electrical resistance measurement; Kelvin; Periodic structures; Resistance; Resists; Through-silicon vias; Daisy chain; Kelvin structure; TSV; electroplating; photoresist CMP;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures (ICMTS), 2013 IEEE International Conference on

Conference_Location

Osaka, Japan

ISSN

1071-9032

Print_ISBN

978-1-4673-4845-4

Electronic_ISBN

1071-9032

Type

conf

DOI

10.1109/ICMTS.2013.6528142

Filename

6528142