A test structure for analysis of temperature distribution in CMOS LSI with sensing device array

Author

Matsuda, Tadamitsu ; Hanai, H. ; Iwata, Hiroshi ; Kondo, Daishi ; Hatakeyama, T. ; Ishizuka, M. ; Ohzone, T.

Author_Institution

Dept. of Inf. Syst. Eng., Toyama Prefectural Univ., Toyama, Japan

fYear

2013

fDate

25-28 March 2013

Firstpage

131

Lastpage

134

Abstract

A test structure for analysis of temperature distribution in CMOS LSI is presented. Fundamental thermal properties of LSI chip were measured and discussed with simulation results. The test structure consists of 24 sensor blocks, each of which has a resistor as an on-chip heater, a p-n diode array for temperature sensing and selector switches. Dependence of heating time and distance from the resistor were analyzed as well as transient phenomena. The test structure can provide an effective methodology for analysis of fundamental thermal properties in LSIs packaged in various ways.

Keywords

CMOS integrated circuits; integrated circuit packaging; integrated circuit testing; large scale integration; resistors; temperature distribution; temperature measurement; temperature sensors; CMOS LSI; fundamental thermal property; heating time dependence; on-chip heater; p-n diode array; resistor; selector switches; sensing device array; temperature distribution analysis; temperature sensing; test structure; transient phenomena; Heating; Large scale integration; Resistors; Temperature dependence; Temperature distribution; Temperature measurement; Temperature sensors; CMOS; on chip sensor; temperature distribution;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures (ICMTS), 2013 IEEE International Conference on

Conference_Location

Osaka, Japan

ISSN

1071-9032

Print_ISBN

978-1-4673-4845-4

Electronic_ISBN

1071-9032

Type

conf

DOI

10.1109/ICMTS.2013.6528159

Filename

6528159