DocumentCode
606241
Title
Probabilistic modeling approaches for nanoscale devices
Author
Kumawat, Renu ; Sahula, Vineet ; Gaur, Manoj Singh
Author_Institution
Department of ECE, Malviya National Institute of Technology, Jaipur, India
fYear
2013
fDate
20-21 March 2013
Firstpage
720
Lastpage
724
Abstract
The continual downsizing of silicon technology to nanoscale has enabled the realization of ultra high density, low power chips. However, such devices are inherently unreliable, contingent and prone to soft transient errors. As the deterministic approaches fail to model their behavior, and estimate the effect of soft transient errors on nanoscale devices, many probabilistic approaches have been proposed in literatures. In this manuscript, a comparative study of many of these approaches is presented. A computational framework based on Markov Random Field, Probabilistic Transfer Matrices and Probabilistic Decision Diagram is developed using MATLAB for design and analysis of combinational circuits at nanoscale. It is observed that Bayesian Network and Probabilistic Decision Diagrams have least time complexity among these approaches. The Probabilistic Transfer Matrices and Markov Random Fields are difficult to scale as they require lot of memory and long simulation time. However, Probabilistic Transfer Matrices provide more accurate output error probability.
Keywords
Analytical models; Complexity theory; Logic gates; Nanoscale devices; Probabilistic logic; Reliability; Switches; Bayesian Network; Markov Random Field; Probabilistic Decision Diagrams; Probabilistic Transfer Matrices; probabilistic modeling; reliability; soft transient errors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits, Power and Computing Technologies (ICCPCT), 2013 International Conference on
Conference_Location
Nagercoil
Print_ISBN
978-1-4673-4921-5
Type
conf
DOI
10.1109/ICCPCT.2013.6528997
Filename
6528997
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