Proposal of a sub-λ switching network and its time-slot assignment algorithm for network with asynchronous time-slot phase

We propose a sub-λ switching network which has fine granularity and low cost/power consumption. In this network, each wavelength is divided in time domain to achieve fine granularity, but buffers are eliminated from the core network to reduce switching cost and power consumption. Buffers are located only at the entrance of the network in order to groom ingress traffic, and all nodes in this network are operated synchronously under a certain time-control mechanism. The problem in this network is the rather long guard-time which is required to absorb the clock synchronization error and time-slot-phase difference, which is caused by the various fiber lengths between nodes (asynchronous phase network). To solve this problem, we propose a novel time-slot assignment algorithm using multi-time-slot bonding technique and delay-shift packing technique with global-time-based delay shift. By using the proposed method, we could improve the utilization of link capacity by 45% compared with the conventional method.