DocumentCode
609699
Title
Current-mirror miller compensation: An improved frequency compensation technique for two-stage amplifiers
Author
Min Tan ; Wing-Hung Ki
Author_Institution
Hong Kong Univ. of Sci. & Technol., Hong Kong, China
fYear
2013
fDate
22-24 April 2013
Firstpage
1
Lastpage
4
Abstract
A novel current-mirror miller compensated two-stage amplifier is presented. The proposed design improves both large-signal performance and small-signal performance of conventional two-stage amplifiers. This design eliminates the low-frequency right half-plane zero and reduces the output parasitic capacitance of the first stage without inducing additional input offset voltage and DC8 gain degradation8 Detailed ansisi performed to justify the proposed design. The design is simulated in UMC130 CMOS technology. Simulations agree well with analysis. This idea may be extended to multistage amplifiers, low-dropout regulators and other applications.
Keywords
CMOS analogue integrated circuits; current mirrors; DC gain degradation; UMC130 CMOS technology; current-mirror miller compensation; frequency compensation technique; input offset voltage; large-signal performance; low-frequency right half-plane zero; multistage amplifiers; parasitic capacitance; small-signal performance; two-stage amplifiers;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, Automation, and Test (VLSI-DAT), 2013 International Symposium on
Conference_Location
Hsinchu
Print_ISBN
978-1-4673-4435-7
Type
conf
DOI
10.1109/VLDI-DAT.2013.6533876
Filename
6533876
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