Statistical Static Timing Analysis of Conditional Asynchronous Circuits Using Model-Based Simulation

Author

Yahya, Eslam ; Fesquet, Laurent ; Ismail, Yousr ; Renaudin, Marc

Author_Institution

Center of Nanoelectron. & Devices (CND), American Univ. in Cairo/Zewail City of Sci. & Technol., Cairo, Egypt

fYear

2013

fDate

19-22 May 2013

Firstpage

67

Lastpage

74

Abstract

Asynchronous designs are usually composed of conditional circuits. The analysis of these circuits is complex especially when delay variability is considered. In this paper, we design and implement a model-based Statistical Static Timing Analysis "SSTA" framework that is able to analyze conditional asynchronous circuits in efficient time. First, the paper introduces how the conditional circuits can be modeled, and then it shows how this model can be used to realize the SSTA analysis.

Keywords

asynchronous circuits; integrated circuit design; statistical analysis; SSTA framework; asynchronous designs; conditional asynchronous circuits; delay variability; model-based simulation; statistical static timing analysis; Conditional Asynchronous Circuits; Delay Variability; Performance Analysis; SSTA for Asynchronous Circuits; STA;

fLanguage

English

Publisher

ieee

Conference_Titel

Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on

Conference_Location

Santa Monica, CA

ISSN

1522-8681

Print_ISBN

978-1-4673-5956-6

Type

conf

DOI

10.1109/ASYNC.2013.12

Filename

6546179