• DocumentCode
    61329
  • Title

    Izhikevich neuron circuit using stochastic logic

  • Author

    Sato, Seiki ; Akima, H. ; Nakajima, Kensuke ; Sakuraba, Masao

  • Author_Institution
    Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan
  • Volume
    50
  • Issue
    24
  • fYear
    2014
  • fDate
    11 20 2014
  • Firstpage
    1795
  • Lastpage
    1797
  • Abstract
    A digital circuit of the Izhikevich neuron model using stochastic logic is proposed. Stochastic logic is employed in order to save the number of transistors required for multiplication operations. Successful operation of the proposed circuit has been confirmed.
  • Keywords
    integrated circuit modelling; integrated logic circuits; stochastic processes; Izhikevich neuron circuit; digital circuit; multiplication operations; stochastic logic;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2014.3627
  • Filename
    6968720
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=61329