• DocumentCode
    613530
  • Title

    Fault collapsing of multi-conditional faults

  • Author

    Krenz-Baath, Rene ; Glowatz, A. ; Hapke, Friedrich

  • Author_Institution
    Hochschule Hamm-Lippstadt, Hamm, Germany
  • fYear
    2013
  • fDate
    8-10 April 2013
  • Firstpage
    42
  • Lastpage
    47
  • Abstract
    Numerous new multi-conditional fault models have been proposed in the last years. In combination with the increasing complexity of today´s designs these new fault models cause a tremendous increases of the ATPG-runtime. In this paper we present a novel fault collapsing scheme for multi-conditional faults. The objective is to significantly reduce the fault set and hence reduce runtime for ATPG and fault diagnosis. The collapsing technique consists of three individual collapsing stages, which are individually discussed and evaluated. Additionally we provide an extensive set of experimental results including runtimes of a state-of-the-art ATPG-tool applied on a set of large industrial designs. We will demonstrate that the achieved reduction of up to 48% of the number of faults also reduces the ATPG runtime significantly.
  • Keywords
    failure analysis; fault diagnosis; integrated circuit testing; ATPG-runtime reduction; ATPG-tool; IC testing; collapsing stages; fault collapsing scheme; fault set reduction; industrial designs; multiconditional fault model; Automatic test pattern generation; Circuit faults; Delays; Integrated circuit modeling; Libraries; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2013 IEEE 16th International Symposium on
  • Conference_Location
    Karlovy Vary
  • Print_ISBN
    978-1-4673-6135-4
  • Electronic_ISBN
    978-1-4673-6134-7
  • Type

    conf

  • DOI
    10.1109/DDECS.2013.6549786
  • Filename
    6549786