DocumentCode
618939
Title
Simulation of threshold voltage adjustment by B+ implantation for pMOS-RADFET application
Author
Shuaimin Wang ; Peng Liu ; Jinwen Zhang
Author_Institution
Inst. of Microelectron., Peking Univ., Beijing, China
fYear
2013
fDate
7-10 April 2013
Firstpage
262
Lastpage
265
Abstract
pMOS-RADFET (radiation field-effect transistor) as micro-dosimeter has been widely applied in spacecraft, medicine and personnel dosimetry. Thick gate-oxide and zero threshold voltage (Vth) are two critical factors to achieve high performance pMOS-RADFET. In this paper, the Vth adjustment techniques for thick gate oxide by B+ implantation are simulated systematically by Silvaco TCAD, including implanting energy, dose and annealing conditions. And the impurity distributions both in gate-oxide and silicon substrate are analyzed. The results show that implanting energy up to 130keV and dose as 3.2e11 works well for 388nm gate-oxide. Considering activation and distribution of impurity, both annealing temperature and time has to be as low and short as possible.
Keywords
MOSFET; annealing; boron; dosimeters; impurity distribution; technology CAD (electronics); B; B+ implantation; Silvaco TCAD; annealing conditions; annealing temperature; electron volt energy 130 keV; high performance pMOS-RADFET application; impurity distributions; microdosimeter; personnel dosimetry; radiation field-effect transistor; size 388 nm; spacecraft; thick gate-oxide; threshold voltage adjustment; zero threshold voltage; Annealing; Boron; Impurities; Logic gates; Sensitivity; Silicon; Threshold voltage; RADFET; impurity concentration; process simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Nano/Micro Engineered and Molecular Systems (NEMS), 2013 8th IEEE International Conference on
Conference_Location
Suzhou
Electronic_ISBN
978-1-4673-6351-8
Type
conf
DOI
10.1109/NEMS.2013.6559728
Filename
6559728
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