• DocumentCode
    62267
  • Title

    Modeling Illumination Effects on n- and p-Type InGaAs MOS at Room and Low Temperatures

  • Author

    Han-Ping Chen ; Veksler, Dmitry ; Bersuker, Gennadi ; Yuan Taur

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of California, San Diego, La Jolla, CA, USA
  • Volume
    61
  • Issue
    5
  • fYear
    2014
  • fDate
    May-14
  • Firstpage
    1483
  • Lastpage
    1487
  • Abstract
    InGaAs MOS C-V and G-V characteristics are measured under illumination to identify regions of strong minority carrier response related to surface inversion. For the MOS structure with n-type substrate biased in inversion, a high density of surface states in the proximity of the valence band edge is present that masks the response of light generated minority carriers at room temperature. Much stronger effect of illumination is observed at low temperature where the surface-state response is suppressed due to carrier freeze out. On the other hand, for the MOS structure with p-type substrate, strong minority carrier response under illumination is readily observed in inversion even at room temperature, reflecting that the density of surface states near the edge of conduction band is negligible. All the data can be explained in the framework of small-signal equivalent circuit, by modeling the minority carrier generation with a light-dependent conductance plugged in between the conduction band and the valence band. The model is validated against the measured MOS conductance with and without light in inversion.
  • Keywords
    III-V semiconductors; MOSFET; equivalent circuits; gallium arsenide; indium compounds; interface states; minority carriers; semiconductor device models; InGaAs; MOSFET; conduction band; illumination effects; interface state model; minority carrier response; small-signal equivalent circuit; surface inversion; surface-state response; temperature 293 K to 298 K; valence band edge; Capacitance; Indium gallium arsenide; Integrated circuit modeling; Interface states; Lighting; Logic gates; Substrates; InGaAs; MOS; MOS.; interface state model; light illumination;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2014.2312329
  • Filename
    6782695