DocumentCode
624332
Title
Efficient implementation of cryptographic primitives on the GA144 multi-core architecture
Author
Schneider, T. ; von Maurich, Ingo ; Guneysu, Tim
Author_Institution
Horst Gortz Inst. for IT-Security, Ruhr Univ. Bochum, Bochum, Germany
fYear
2013
fDate
5-7 June 2013
Firstpage
67
Lastpage
74
Abstract
With myriads of small and pervasive devices in our digital age, the availability of low-power and energy-efficient processing technology has become absolutely essential. Most of these constrained devices need to incorporate security services for confidentiality and privacy in addition to their primary tasks - typically involving computationally expensive cryptography. In the last years, many researchers have worked on novel lightweight cryptographic constructions to minimize the computational burden on the constrained devices. However, most of those alternative constructions sacrificed security for simplicity, potentially enabling just as simple attacks. In this work, we aim for another approach and implement standardized and well-established cryptography on a special but very lightweight platform, namely an asynchronous GA144 ultra-low-powered multicore processor with 144 simplistic cores. For the first time, we demonstrate that symmetric and asymmetric cryptography such as AES and RSA is even feasible on such a low-end and unclocked device. With energy consumption being as low as 0.63 μJ and 22.3 mJ, this platform achieves a performance of 38 μs and 462.9 ms per AES and RSA operation, respectively. Both energy consumption as well as computation time are significantly lower than many lightweight implementations reported so far.
Keywords
energy conservation; energy consumption; low-power electronics; multiprocessing systems; power aware computing; public key cryptography; AES operation; RSA operation; asymmetric cryptography; asynchronous GA144 ultralow-powered multicore processor; computationally expensive cryptography; cryptographic primitive implementation; energy consumption; energy-efficient processing technology; lightweight cryptographic constructions; low-end device; low-power technology; security services; unclocked device; Arrays; Ciphers; Encryption; Energy consumption; Multicore processing; Schedules;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on
Conference_Location
Washington, DC
ISSN
2160-0511
Print_ISBN
978-1-4799-0494-5
Type
conf
DOI
10.1109/ASAP.2013.6567552
Filename
6567552
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