DocumentCode
624682
Title
The implementation of FIR low-pass filter based on FPGA and DA
Author
Cui Guo-wei ; Wang Feng-ying
Author_Institution
Dept. of Inf. Eng., Inner Mongolia Univ. of Sci. & Technol., Baotou, China
fYear
2013
fDate
9-11 June 2013
Firstpage
604
Lastpage
608
Abstract
The DA(distributed algorithm) is the key of FIR filter implementation based on FPGA, compared with the traditional multiply-add structure, DA has the characteristics of parallel data processing and efficient operation. This paper shows that the design method of a 16 order FI R filter based on FPGA is studied, using VHDL language. Simulation experiments and time series analysis are carried out in EDA platform of ALTERA, the design is verified by being downloaded to the EPF10K10LC84-3 FPGA chip. The design of FPGA has practical applications in digital signal processing; it has certain directive significance to the reform of electronic technology practice teaching.
Keywords
FIR filters; distributed algorithms; field programmable gate arrays; hardware description languages; low-pass filters; simulation; time series; ALTERA; EDA platform; EPF10K10LC84-3 FPGA chip; FIR low-pass filter; VHDL language; distributed algorithm; multiply-add structure; simulation experiments; time series analysis; Convolution; Distributed algorithms; Equations; Field programmable gate arrays; Finite impulse response filters; MATLAB; Read only memory; DA; FIR; FPGA;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Control and Information Processing (ICICIP), 2013 Fourth International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4673-6248-1
Type
conf
DOI
10.1109/ICICIP.2013.6568146
Filename
6568146
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