• DocumentCode
    627729
  • Title

    A fault tolerant NoC architecture based upon external router backup paths

  • Author

    Castro, Helano S. ; de Lima, Otavio Alcantara

  • Author_Institution
    Teleinformatics Dept., Univ. Fed. do Ceara, Fortaleza, Brazil
  • fYear
    2013
  • fDate
    16-19 June 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    As the scale of integration of digital circuits increases, there is a corresponding increase in the probability of permanent failures in NoCs. As a result, it is essential that NoCs have fault tolerance mechanisms in order to cope with this issue. In this article, we present a NoC architecture for a fault-tolerant multiprocessor chip based upon the use of backup paths which are external to the router, which allows maintaining communication between non-faulty network´s routers. In the event of a permanent failure in a router, the control mechanism of backup paths is triggered in such a way that the faulty router is by-passed and the data is routed in a transparent way. Thus, data going through the faulty router from east to west and from north to south go all the way through to the final destination. The routing algorithm used in this version of the architecture uses a modified version of the XY routing algorithm. The results of performance evaluation show that the proposed architecture has a higher resiliency and provides lower latency than NoCs that make use of partially adaptive or stochastic algorithms.
  • Keywords
    fault tolerance; microprocessor chips; multiprocessing systems; network routing; network-on-chip; control mechanism; digital circuit; external router backup path; fault tolerance mechanism; fault tolerant NoC architecture; fault tolerant multiprocessor chip; faulty router; nonfaulty network router; permanent failure; probability; resiliency; routing algorithm; stochastic algorithm; Circuit faults; Computer architecture; Fault tolerance; Fault tolerant systems; Ports (Computers); Proposals; Routing; fault-tolerant architecture; networks-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    New Circuits and Systems Conference (NEWCAS), 2013 IEEE 11th International
  • Conference_Location
    Paris
  • Print_ISBN
    978-1-4799-0618-5
  • Type

    conf

  • DOI
    10.1109/NEWCAS.2013.6573562
  • Filename
    6573562