• DocumentCode
    631158
  • Title

    Deinterleaving with limited input parameters

  • Author

    Jiri, Vesely ; Petr, Bojda

  • Author_Institution
    Dept. of the radar Syst., Univ. of Defence, Brno, Czech Republic
  • Volume
    1
  • fYear
    2013
  • fDate
    19-21 June 2013
  • Firstpage
    296
  • Lastpage
    300
  • Abstract
    The interleaving is an essential part of the radar warning receiver (RWR) decision making process. Received signals are processed to classify the source which RWR observes and to determine the level of threat. Proposed de-interleaving algorithm is based on the presumption that only limited set of input parameters is available. The algorithm is based on the combination of pulse-width selectors, pulse-repetition-interval selectors and final group pulse detector. De-interleaving algorithm has been implemented into the FPGA circuit.
  • Keywords
    decision making; field programmable gate arrays; radar detection; radar receivers; radar signal processing; FPGA circuit; RWR; decision making process; deinterleaving algorithm; group pulse detector; pulse repetition interval selectors; pulse width selectors; radar signal processing; radar warning receiver; Algorithm design and analysis; Classification algorithms; Detectors; Field programmable gate arrays; Radar; Shift registers; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radar Symposium (IRS), 2013 14th International
  • Conference_Location
    Dresden
  • Print_ISBN
    978-1-4673-4821-8
  • Type

    conf

  • Filename
    6581103