DocumentCode
633875
Title
Method to increase defect localization success rate on open failure by combining circuit layout analysis with photon emission microscopy
Author
Lee Guan Siong ; Chin, Alvin ; Chow Fong Ling ; Pee Kok Keng
Author_Institution
Syst. on Silicon Manuf. Co. Pte Ltd., Singapore, Singapore
fYear
2013
fDate
15-19 July 2013
Firstpage
408
Lastpage
412
Abstract
Fault isolation technique is crucial to determine the success rate in semiconductor failure analysis process. One of the most common and powerful technique is photon emission microscopy (PEM) which uses a sensitive camera (CCD or InGaAs camera) to detect any excessive electron-hole pair radioactive recombination activity from electrical biased device. However in some cases, the PEM defect localization hotspot location does not always match to the actual defect site. By combining PEM and circuit layout analysis, a method has been developed to increase defect localization success rate which will be presented in this paper.
Keywords
cameras; fault location; integrated circuit layout; integrated circuit reliability; integrated circuit testing; optical microscopy; PEM defect localization hotspot location; circuit layout analysis; defect localization success rate; fault isolation technique; open failure; photon emission microscopy; semiconductor failure analysis; sensitive camera; Failure analysis; Integrated circuit interconnections; Inverters; Layout; Metals; Microscopy; Photonics;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits (IPFA), 2013 20th IEEE International Symposium on the
Conference_Location
Suzhou
ISSN
1946-1542
Print_ISBN
978-1-4799-1241-4
Type
conf
DOI
10.1109/IPFA.2013.6599191
Filename
6599191
Link To Document