Channel thermal noise modeling and high frequency noise parameters of tri-gate FinFETs

Author

Mukherjee, Chhandak ; Maiti, C.K.

Author_Institution

Dept. of Electron., Indian Inst. of Technol., Kharagpur, Kharagpur, India

fYear

2013

fDate

15-19 July 2013

Firstpage

732

Lastpage

735

Abstract

With rapid downscaling of conventional MOSFETs, alternative device architectures are essential. Post-planar non-classical FinFET structures are becoming a popular choice for their reduced short channel effects, electrostatic integrity as well as superior RF performance. Noise is a fundamental problem for RF circuit design. In this work, to understand RF performance, high frequency noise parameters in tri-gate FinFETs are studied in detail. Methods and models for extracting different noise parameters, such as the minimum noise figure, equivalent noise resistance and optimum source admittance, are developed from 50-Ω noise figure measurements. A channel thermal noise model of tri-gate FinFETs is shown in comparison with the experimental data.

Keywords

MOSFET; circuit noise; semiconductor device models; thermal noise; MOSFET; RF circuit design; electrostatic integrity; equivalent noise resistance; high frequency noise parameters; noise figure; optimum source admittance; post-planar nonclassical FinFET structures; resistance 50 ohm; short channel effects; tri-gate FinFET; FinFETs; Integrated circuit modeling; Noise; Noise figure; Optimized production technology; Equivalent noise resistance; FinFETs; High frequency noise parameters; MOSFET channel noise; Noise; Noise figure; Tri-gate MOSFETs;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits (IPFA), 2013 20th IEEE International Symposium on the

Conference_Location

Suzhou

ISSN

1946-1542

Print_ISBN

978-1-4799-1241-4

Type

conf

DOI

10.1109/IPFA.2013.6599265

Filename

6599265