An inductorless 34 Gbit/s half-rate 4:1 multiplexer in 0.25-μm SiGe technology

This paper demonstrates a 34 Gbit/s 4:1 multiplexer with 200 mW power dissipation in a 0.25-μm SiGe process. A multiphase clock architecture at half-rate clock is chosen to reduce the power dissipation. In addition, stability issues caused by the capacitively loaded clock driver are studied and a solution is proposed with a suitable compensation circuit. Measurement results are presented as well. The output signals yield open eye diagrams at the highest available test rate of 34 Gbit/s, while presenting rise and fall times below 12 ps.