DocumentCode
638250
Title
Effect of fault patterns on systems level diagnosis of mesh networks
Author
Srivastava, Hari Om ; Gupta, S.C.
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol. (BHU), Varanasi, India
fYear
2013
fDate
26-28 July 2013
Firstpage
1
Lastpage
4
Abstract
Fault Diagnostics is one of the major requirements for assuring dependability of complex systems. In Systems level diagnostic procedures applied to computer interconnection networks, the processors diagnose each other and under certain conditions faulty processors can be identified. This paper simulates a system-level diagnosis algorithm for mesh with wraparound, topology to locate the faulty units in the system. It is observed that diagnosis cost varies with the number of faulty units, and also with the fault pattern. Also, simulation has been done for special fault patterns for which correct and complete diagnosis of the system cannot be done.
Keywords
fault diagnosis; microprocessor chips; multiprocessor interconnection networks; network topology; computer interconnection networks; fault diagnostics; fault pattern effect; faulty processors; faulty units; mesh networks; special fault patterns; systems level diagnosis; systems level diagnostic procedures; Computer architecture; Fault diagnosis; Mesh networks; Program processors; Simulation; Topology; Mesh topology; fault pattern; reliability; systems level diagnosis;
fLanguage
English
Publisher
ieee
Conference_Titel
Wireless and Optical Communications Networks (WOCN), 2013 Tenth International Conference on
Conference_Location
Bhopal
ISSN
2151-7681
Print_ISBN
978-1-4673-5997-9
Type
conf
DOI
10.1109/WOCN.2013.6616236
Filename
6616236
Link To Document