A 9-bit 123-MS/s swiched-current pipelined ADC with OP feedback and offset current cancellation

This paper presents a 9-bit 123-MS/s switched-current pipelined analog-to-digital converter (ADC) with low transmission error and small channel charge injection. To decrease the transmission error, a current mirror with op feedback is used. Furthermore, both dummy switch and offset current cancellation are adopted to reduce the channel charge injection. As the proposed pipelined ADC is implemented in TSMC 1P6M 0.18-μm CMOS technology, the simulation results show that the signal-to-noise and distortion (SNDR), differential nonlinearity, integral nonlinearity, and power consumption are 55.56 dB, -0.21~+0.19 LSB, -0.1~+0.37 LSB, and 45.5 mW, respectively, at the input frequency of 5MHz, sampling rate of 123 MS/s, and the supply voltage of 1.8 V. Notify that the figure of merit of the proposed pipelined ADC is about 0.78pJ/conversion at the operational current range of -20μA~+20μA.