• DocumentCode
    650148
  • Title

    Three-dimensional stacking of silicon chips - An industrial viewpoint

  • Author

    Weber, W.

  • Author_Institution
    Infineon Technol., IFAG BEX RDE RDF, Munich, Germany
  • fYear
    2013
  • fDate
    2-6 Sept. 2013
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    While the semiconductor industry develops into the mature state, growth rates are decreasing and a decreasing percentage of the industry uses the most recent feature sizes of Moore´s law. In parallel, specific smart developments become increasingly important, often summarized as More-than-Moore. 3D integration is one of them. The paper summarizes different 3D technologies and provides details of a specific European project on this subject which uses some of them. Two economically relevant use cases are presented and the challenges and chances of 3D chip stacking are discussed.
  • Keywords
    semiconductor industry; three-dimensional integrated circuits; 3D integration; Moore law; More-than-Moore; semiconductor industry; silicon chips; three-dimensional stacking; 3D Integration; Interchip via; More than Moore; Through Silicon Via; chip stacking;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics Technology and Devices (SBMicro), 2013 Symposium on
  • Conference_Location
    Curitiba
  • Print_ISBN
    978-1-4799-0516-4
  • Type

    conf

  • DOI
    10.1109/SBMicro.2013.6676180
  • Filename
    6676180