Modifications of silicon nitride materials for SONOS memories

In this work we review the development of ion beam modified silicon nitride charge trap memories. Silicon low energy (typically ~1 keV) ion implantation into silicon oxide/nitride dielectric stacks may lead to two different memory structures depending on the post implantation processing steps. Annealing at 950 °C for 30 min in inert ambient of the implanted oxide/nitride stacks leads to the formation of a silicon nanoparticle band into the silicon nitride. To be functional such a structure required the subsequent deposition of a control dielectric layer. Alternatively wet oxidation at 850 °C for 15 min of the same dielectric stacks leads to the formation of a thick top silicon oxide layer. Although both structures can inject and trap electrons and holes within the nitride layer, the latter ones have an enhanced ability to retain the trapped charge, fulfilling thus the 10 years retention requirement. This property is attributed to the modification of the silicon nitride layer deep traps under the influence of the ion implantation and wet oxidation process steps. Furthermore, comparison between low-thermal budget wet oxidized silicon and inert ion (Ar, N) implanted oxide/nitride stacks shows that the formation of the top oxide depends strongly upon the implanted ions. These comparisons also indicated that nitrogen implanted oxide-nitride stacks shows a similar ability to retain the trapped charge. The above results demonstrate that low-energy ion implantation is an effective and versatile technique for the synthesis of high performance charge trapping memories.