DocumentCode
661597
Title
Interdigitated LDMOS
Author
Jaejune Jang ; Kyu-Heon Cho ; Dongeun Jang ; Minhwan Kim ; Changjoon Yoon ; Junsung Park ; Hyunsil Oh ; Chiho Kim ; Hyoungsoo Ko ; Keunho Lee ; Sangbae Yi
Author_Institution
Samsung Electron., Yongin, South Korea
fYear
2013
fDate
26-30 May 2013
Firstpage
245
Lastpage
248
Abstract
Novel Interdigitated LDMOS is experimented resulting in best in class RSP-BVDSS performance (21.8mΩ-mm2 with BVDSS of 47V) in comparison to published LDMOS. RSP improvement is made through additional current path by removing STI region in drift area. Breakdown voltage is maintained with lateral field plate effect from side of the current path. Proposed Interdigitated LDMOS satisfies reliability criteria (HCI, snap back) as 40V device. All of this is obtained without any process change.
Keywords
MOS integrated circuits; electric breakdown; integrated circuit reliability; HCI; RSP-BVDSS performance; STI region removal; breakdown voltage; interdigitated LDMOS; lateral field plate effect; reliability; voltage 40 V; voltage 47 V; Capacitance; Fingers; Human computer interaction; Logic gates; Performance evaluation; Reliability; Three-dimensional displays;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs (ISPSD), 2013 25th International Symposium on
Conference_Location
Kanazawa
ISSN
1943-653X
Print_ISBN
978-1-4673-5134-8
Type
conf
DOI
10.1109/ISPSD.2013.6694462
Filename
6694462
Link To Document