Power-Hardware-in-the-loop simulation of a D-STATCOM equipped MV network interfaced to an actual PV inverter

Author

Kleftakis, Vasilis ; Rigas, A. ; Vassilakis, A. ; Kotsampopoulos, P. ; Hatziargyriou, Nikos

Author_Institution

Sch. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Athens, Greece

fYear

2013

fDate

6-9 Oct. 2013

Firstpage

1

Lastpage

5

Abstract

Power-Hardware-in-the-Loop (PHIL) simulation is a promising method for studying the interaction of various complex components in current and future electricity grids. This paper firstly examines the applicability of PHIL simulation to Fault-Ride-Through tests. A test setup is implemented with a hardware PV inverter as the Hardware Under Test (HUT). Furthermore, the PHIL method is employed for testing and validating the capability of a D-STATCOM to compensate voltage dips. An average model of a D-STATCOM is developed in the RTDS^® and its influence on the operation of the hardware PV inverter is investigated.

Keywords

invertors; photovoltaic power systems; power grids; static VAr compensators; D-STATCOM-equipped MV network; HUT; PHIL method; PHIL simulation; PV inverter; RTDS; complex component; electricity grids; fault-ride-through tests; hardware PV inverter; hardware under test; power-hardware-in-the-loop simulation; voltage dip compensation; Automatic voltage control; Current measurement; Hardware; Inverters; Voltage fluctuations; Voltage measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Innovative Smart Grid Technologies Europe (ISGT EUROPE), 2013 4th IEEE/PES

Conference_Location

Lyngby

Type

conf

DOI

10.1109/ISGTEurope.2013.6695449

Filename

6695449