A 110–180 GHz broadband amplifier in 65-nm CMOS process

Author

Po-Han Chen ; Jui-Chih Kao ; Tian-Li Yu ; Yao-Wen Hsu ; Yu-Ming Teng ; Guo-Wei Huang ; Huei Wang

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

2013

fDate

2-7 June 2013

Firstpage

1

Lastpage

3

Abstract

A 110-180 GHz broadband amplifier with 10 dB small signal gain is developed in 65-nm CMOS process. The small signal gain of this amplifier is 19 dB at 170 GHz. To the authors´ knowledge, this is the first amplifier covering full D-band. This paper proposes a design method to determine the minimal amount of cascade stages with the desirable gain performance. In order to enhance the bandwidth, the impedance transformation technique using a trans-impedance stage is also discussed. The topology of proposed circuit has 4-stage single-ended cascode and one trans-impedance stage, and the total chip size is 0.37mm².

Keywords

CMOS integrated circuits; operational amplifiers; wideband amplifiers; 4-stage single-ended cascode; CMOS process; D-band; broadband amplifier; cascade stage; frequency 110 GHz to 180 GHz; frequency 170 GHz; gain 19 dB; impedance transformation technique; size 65 nm; small signal gain; trans-impedance stage; Bandwidth; Broadband amplifiers; CMOS integrated circuits; CMOS process; Gain; Impedance; Transistors; CMOS millimeter-wave integrated circuits; D-band; broadband amplifier; matching technique;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest (IMS), 2013 IEEE MTT-S International

Conference_Location

Seattle, WA

ISSN

0149-645X

Print_ISBN

978-1-4673-6177-4

Type

conf

DOI

10.1109/MWSYM.2013.6697374

Filename

6697374