DocumentCode
666562
Title
Hardware-in-the-Loop optimization of the 3-phase grid connected converter controller
Author
Adzic, Evgenije ; Grabic, Stevan ; Vekic, Marko ; Porobic, Vlado ; Celanovic, Nikola Fischer
Author_Institution
Fac. of Tech. Sci., Dept. for Power Electron. & Drives, Univ. of Novi Sad, Novi Sad, Serbia
fYear
2013
fDate
10-13 Nov. 2013
Firstpage
5392
Lastpage
5397
Abstract
This paper illustrates how the HIL devices of the latest generation can be used to aid in the design, optimization and quality assurance of PE controllers. Such devices can have as low as 0.5μs fixed time step and a PWM sampling frequency that can be as low as 6ns which makes them ideal to support controller development processes from the early design stage all the way to type testing and release testing stage.
Keywords
PWM power convertors; optimisation; 3-phase grid connected converter controller; HIL devices; PE controllers; PWM sampling frequency; controller development processes; design stage; hardware-in-the-loop optimization; quality assurance; release testing stage; Hardware; Optimization; Phase locked loops; Power harmonic filters; Pulse width modulation; Voltage control; Voltage measurement; controller design; grid conected converter; hardware-in-the-loop; qualit assurance;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics Society, IECON 2013 - 39th Annual Conference of the IEEE
Conference_Location
Vienna
ISSN
1553-572X
Type
conf
DOI
10.1109/IECON.2013.6700013
Filename
6700013
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